diff -Nru glibc-2.3.3/Makeconfig glibc-2.3.3.patched/Makeconfig --- glibc-2.3.3/Makeconfig 2003-09-17 10:36:10.000000000 +0200 +++ glibc-2.3.3.patched/Makeconfig 2005-05-21 18:42:24.000000000 +0200 @@ -511,7 +511,7 @@ link-extra-libs-bounded = $(foreach lib,$(LDLIBS-$(@F:%-bp=%)),$(common-objpfx)$(lib)_b.a) ifndef gnulib -gnulib := -lgcc -lgcc_eh +gnulib := -lgcc endif ifeq ($(elf),yes) +preinit = $(addprefix $(csu-objpfx),crti.o) diff -Nru glibc-2.3.3/sysdeps/arm/bits/endian.h glibc-2.3.3.patched/sysdeps/arm/bits/endian.h --- glibc-2.3.3/sysdeps/arm/bits/endian.h 1999-04-12 11:04:34.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/bits/endian.h 2005-05-21 18:41:35.000000000 +0200 @@ -9,4 +9,8 @@ #else #define __BYTE_ORDER __LITTLE_ENDIAN #endif +#ifdef __MAVERICK__ +#define __FLOAT_WORD_ORDER __BYTE_ORDER +#else #define __FLOAT_WORD_ORDER __BIG_ENDIAN +#endif diff -Nru glibc-2.3.3/sysdeps/arm/fpu/bits/fenv.h glibc-2.3.3.patched/sysdeps/arm/fpu/bits/fenv.h --- glibc-2.3.3/sysdeps/arm/fpu/bits/fenv.h 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/bits/fenv.h 2005-05-21 18:41:35.000000000 +0200 @@ -20,6 +20,45 @@ # error "Never use directly; include instead." #endif +#if defined(__MAVERICK__) + +/* Define bits representing exceptions in the FPU status word. */ +enum + { + FE_INVALID = 1, +#define FE_INVALID FE_INVALID + FE_OVERFLOW = 4, +#define FE_OVERFLOW FE_OVERFLOW + FE_UNDERFLOW = 8, +#define FE_UNDERFLOW FE_UNDERFLOW + FE_INEXACT = 16, +#define FE_INEXACT FE_INEXACT + }; + +/* Amount to shift by to convert an exception to a mask bit. */ +#define FE_EXCEPT_SHIFT 5 + +/* All supported exceptions. */ +#define FE_ALL_EXCEPT \ + (FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT) + +/* IEEE rounding modes. */ +enum + { + FE_TONEAREST = 0, +#define FE_TONEAREST FE_TONEAREST + FE_TOWARDZERO = 0x400, +#define FE_TOWARDZERO FE_TOWARDZERO + FE_DOWNWARD = 0x800, +#define FE_DOWNWARD FE_DOWNWARD + FE_UPWARD = 0xc00, +#define FE_UPWARD FE_UPWARD + }; + +#define FE_ROUND_MASK (FE_UPWARD) + +#else /* FPA */ + /* Define bits representing exceptions in the FPU status word. */ enum { @@ -44,6 +83,8 @@ modes exist, but you have to encode them in the actual instruction. */ #define FE_TONEAREST 0 +#endif + /* Type representing exception flags. */ typedef unsigned long int fexcept_t; diff -Nru glibc-2.3.3/sysdeps/arm/fpu/bits/setjmp.h glibc-2.3.3.patched/sysdeps/arm/fpu/bits/setjmp.h --- glibc-2.3.3/sysdeps/arm/fpu/bits/setjmp.h 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/bits/setjmp.h 2005-05-21 18:41:35.000000000 +0200 @@ -25,10 +25,18 @@ #ifndef _ASM /* Jump buffer contains v1-v6, sl, fp, sp and pc. Other registers are not saved. */ +#ifdef __MAVERICK__ +typedef int __jmp_buf[34]; +#else typedef int __jmp_buf[22]; #endif +#endif +#ifdef __MAVERICK__ +#define __JMP_BUF_SP 32 +#else #define __JMP_BUF_SP 20 +#endif /* Test if longjmp to JMPBUF would unwind the frame containing a local variable at ADDRESS. */ diff -Nru glibc-2.3.3/sysdeps/arm/fpu/fegetround.c glibc-2.3.3.patched/sysdeps/arm/fpu/fegetround.c --- glibc-2.3.3/sysdeps/arm/fpu/fegetround.c 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/fegetround.c 2005-05-21 18:41:35.000000000 +0200 @@ -18,9 +18,21 @@ 02111-1307 USA. */ #include +#include int fegetround (void) { +#if defined(__MAVERICK__) + + unsigned long temp; + + _FPU_GETCW (temp); + return temp & FE_ROUND_MASK; + +#else /* FPA */ + return FE_TONEAREST; /* Easy. :-) */ + +#endif } diff -Nru glibc-2.3.3/sysdeps/arm/fpu/fesetround.c glibc-2.3.3.patched/sysdeps/arm/fpu/fesetround.c --- glibc-2.3.3/sysdeps/arm/fpu/fesetround.c 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/fesetround.c 2005-05-21 18:41:35.000000000 +0200 @@ -18,10 +18,26 @@ 02111-1307 USA. */ #include +#include int fesetround (int round) { +#if defined(__MAVERICK__) + unsigned long temp; + + if (round & ~FE_ROUND_MASK) + return 1; + + _FPU_GETCW (temp); + temp = (temp & ~FE_ROUND_MASK) | round; + _FPU_SETCW (temp); + return 0; + +#else /* FPA */ + /* We only support FE_TONEAREST, so there is no need for any work. */ return (round == FE_TONEAREST)?0:1; + +#endif } diff -Nru glibc-2.3.3/sysdeps/arm/fpu/fpu_control.h glibc-2.3.3.patched/sysdeps/arm/fpu/fpu_control.h --- glibc-2.3.3/sysdeps/arm/fpu/fpu_control.h 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/fpu_control.h 2005-05-21 18:41:35.000000000 +0200 @@ -1,5 +1,6 @@ /* FPU control word definitions. ARM version. - Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 2000, 2005 + Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -20,6 +21,79 @@ #ifndef _FPU_CONTROL_H #define _FPU_CONTROL_H +#if defined(__MAVERICK__) + +/* DSPSC register: (from EP9312 User's Guide) + * + * bits 31..29 - DAID + * bits 28..26 - HVID + * bits 25..24 - RSVD + * bit 23 - ISAT + * bit 22 - UI + * bit 21 - INT + * bit 20 - AEXC + * bits 19..18 - SAT + * bits 17..16 - FCC + * bit 15 - V + * bit 14 - FWDEN + * bit 13 - Invalid + * bit 12 - Denorm + * bits 11..10 - RM + * bits 9..5 - IXE, UFE, OFE, RSVD, IOE + * bits 4..0 - IX, UF, OF, RSVD, IO + */ + +/* masking of interrupts */ +#define _FPU_MASK_IM (1 << 5) /* invalid operation */ +#define _FPU_MASK_ZM 0 /* divide by zero */ +#define _FPU_MASK_OM (1 << 7) /* overflow */ +#define _FPU_MASK_UM (1 << 8) /* underflow */ +#define _FPU_MASK_PM (1 << 9) /* inexact */ +#define _FPU_MASK_DM 0 /* denormalized operation */ + +#define _FPU_RESERVED 0xfffff000 /* These bits are reserved. */ + +#define _FPU_DEFAULT 0x00b00000 /* Default value. */ +#define _FPU_IEEE 0x00b003a0 /* Default + exceptions enabled. */ + +/* Type of the control word. */ +typedef unsigned int fpu_control_t; + +/* Macros for accessing the hardware control word. */ +#define _FPU_GETCW(cw) ({ \ + register int __t1, __t2; \ + \ + __asm__ volatile ( \ + "cfmvr64l %1, mvdx0\n\t" \ + "cfmvr64h %2, mvdx0\n\t" \ + "cfmv32sc mvdx0, dspsc\n\t" \ + "cfmvr64l %0, mvdx0\n\t" \ + "cfmv64lr mvdx0, %1\n\t" \ + "cfmv64hr mvdx0, %2" \ + : "=r" (cw), "=r" (__t1), "=r" (__t2) \ + ); \ +}) + +#define _FPU_SETCW(cw) ({ \ + register int __t0, __t1, __t2; \ + \ + __asm__ volatile ( \ + "cfmvr64l %1, mvdx0\n\t" \ + "cfmvr64h %2, mvdx0\n\t" \ + "cfmv64lr mvdx0, %0\n\t" \ + "cfmvsc32 dspsc, mvdx0\n\t" \ + "cfmv64lr mvdx0, %1\n\t" \ + "cfmv64hr mvdx0, %2" \ + : "=r" (__t0), "=r" (__t1), "=r" (__t2) \ + : "0" (cw) \ + ); \ +}) + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +#else /* FPA */ + /* We have a slight terminology confusion here. On the ARM, the register * we're interested in is actually the FPU status word - the FPU control * word is something different (which is implementation-defined and only @@ -99,4 +173,6 @@ /* Default control word set at startup. */ extern fpu_control_t __fpu_control; +#endif + #endif /* _FPU_CONTROL_H */ diff -Nru glibc-2.3.3/sysdeps/arm/fpu/__longjmp.S glibc-2.3.3.patched/sysdeps/arm/fpu/__longjmp.S --- glibc-2.3.3/sysdeps/arm/fpu/__longjmp.S 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/__longjmp.S 2005-05-21 18:41:35.000000000 +0200 @@ -30,7 +30,33 @@ movs r0, r1 /* get the return value in place */ moveq r0, #1 /* can't let setjmp() return zero! */ +#ifdef __MAVERICK__ + cfldrd mvd4, [ip], #8 + nop + cfldrd mvd5, [ip], #8 + nop + cfldrd mvd6, [ip], #8 + nop + cfldrd mvd7, [ip], #8 + nop + cfldrd mvd8, [ip], #8 + nop + cfldrd mvd9, [ip], #8 + nop + cfldrd mvd10, [ip], #8 + nop + cfldrd mvd11, [ip], #8 + nop + cfldrd mvd12, [ip], #8 + nop + cfldrd mvd13, [ip], #8 + nop + cfldrd mvd14, [ip], #8 + nop + cfldrd mvd15, [ip], #8 +#else lfmfd f4, 4, [ip] ! /* load the floating point regs */ +#endif LOADREGS(ia, ip, {v1-v6, sl, fp, sp, pc}) END (__longjmp) diff -Nru glibc-2.3.3/sysdeps/arm/fpu/setjmp.S glibc-2.3.3.patched/sysdeps/arm/fpu/setjmp.S --- glibc-2.3.3/sysdeps/arm/fpu/setjmp.S 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/fpu/setjmp.S 2005-05-21 18:41:35.000000000 +0200 @@ -24,11 +24,41 @@ ENTRY (__sigsetjmp) /* Save registers */ +#ifdef __MAVERICK__ + cfstrd mvd4, [r0], #8 + nop + cfstrd mvd5, [r0], #8 + nop + cfstrd mvd6, [r0], #8 + nop + cfstrd mvd7, [r0], #8 + nop + cfstrd mvd8, [r0], #8 + nop + cfstrd mvd9, [r0], #8 + nop + cfstrd mvd10, [r0], #8 + nop + cfstrd mvd11, [r0], #8 + nop + cfstrd mvd12, [r0], #8 + nop + cfstrd mvd13, [r0], #8 + nop + cfstrd mvd14, [r0], #8 + nop + cfstrd mvd15, [r0], #8 +#else sfmea f4, 4, [r0]! +#endif stmia r0, {v1-v6, sl, fp, sp, lr} /* Restore pointer to jmp_buf */ +#ifdef __MAVERICK__ + sub r0, r0, #96 +#else sub r0, r0, #48 +#endif /* Make a tail call to __sigjmp_save; it takes the same args. */ B PLTJMP(C_SYMBOL_NAME(__sigjmp_save)) diff -Nru glibc-2.3.3/sysdeps/arm/gccframe.h glibc-2.3.3.patched/sysdeps/arm/gccframe.h --- glibc-2.3.3/sysdeps/arm/gccframe.h 2001-11-16 02:07:20.000000000 +0100 +++ glibc-2.3.3.patched/sysdeps/arm/gccframe.h 2005-05-21 18:41:35.000000000 +0200 @@ -17,6 +17,10 @@ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. */ +#ifdef __MAVERICK__ +#define FIRST_PSEUDO_REGISTER 43 +#else #define FIRST_PSEUDO_REGISTER 27 +#endif #include diff -Nru glibc-2.3.3/sysdeps/arm/gmp-mparam.h glibc-2.3.3.patched/sysdeps/arm/gmp-mparam.h --- glibc-2.3.3/sysdeps/arm/gmp-mparam.h 2001-07-07 12:13:04.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/gmp-mparam.h 2005-05-21 18:41:35.000000000 +0200 @@ -26,5 +26,13 @@ #define BITS_PER_SHORTINT 16 #define BITS_PER_CHAR 8 +#if defined(__ARMEB__) +#define IEEE_DOUBLE_BIG_ENDIAN 1 +#define IEEE_DOUBLE_MIXED_ENDIAN 0 +#elif defined(__MAVERICK__) +#define IEEE_DOUBLE_BIG_ENDIAN 0 +#define IEEE_DOUBLE_MIXED_ENDIAN 0 +#else #define IEEE_DOUBLE_BIG_ENDIAN 0 #define IEEE_DOUBLE_MIXED_ENDIAN 1 +#endif diff -Nru glibc-2.3.3/sysdeps/arm/ieee754.h glibc-2.3.3.patched/sysdeps/arm/ieee754.h --- glibc-2.3.3/sysdeps/arm/ieee754.h 2001-07-06 06:55:48.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/arm/ieee754.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,115 +0,0 @@ -/* Copyright (C) 1992, 1995, 1996, 1998 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, write to the Free - Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA - 02111-1307 USA. */ - -#ifndef _IEEE754_H - -#define _IEEE754_H 1 -#include - -#include - -__BEGIN_DECLS - -union ieee754_float - { - float f; - - /* This is the IEEE 754 single-precision format. */ - struct - { - unsigned int mantissa:23; - unsigned int exponent:8; - unsigned int negative:1; - } ieee; - - /* This format makes it easier to see if a NaN is a signalling NaN. */ - struct - { - unsigned int mantissa:22; - unsigned int quiet_nan:1; - unsigned int exponent:8; - unsigned int negative:1; - } ieee_nan; - }; - -#define IEEE754_FLOAT_BIAS 0x7f /* Added to exponent. */ - - -union ieee754_double - { - double d; - - /* This is the IEEE 754 double-precision format. */ - struct - { - unsigned int mantissa0:20; - unsigned int exponent:11; - unsigned int negative:1; - unsigned int mantissa1:32; - } ieee; - - /* This format makes it easier to see if a NaN is a signalling NaN. */ - struct - { - unsigned int mantissa0:19; - unsigned int quiet_nan:1; - unsigned int exponent:11; - unsigned int negative:1; - unsigned int mantissa1:32; - } ieee_nan; - }; - -#define IEEE754_DOUBLE_BIAS 0x3ff /* Added to exponent. */ - - -/* The following two structures are correct for `new' floating point systems but - wrong for the old FPPC. The only solution seems to be to avoid their use on - old hardware. */ - -union ieee854_long_double - { - long double d; - - /* This is the IEEE 854 double-extended-precision format. */ - struct - { - unsigned int exponent:15; - unsigned int empty:16; - unsigned int negative:1; - unsigned int mantissa1:32; - unsigned int mantissa0:32; - } ieee; - - /* This is for NaNs in the IEEE 854 double-extended-precision format. */ - struct - { - unsigned int exponent:15; - unsigned int empty:16; - unsigned int negative:1; - unsigned int mantissa1:32; - unsigned int mantissa0:30; - unsigned int quiet_nan:1; - unsigned int one:1; - } ieee_nan; - }; - -#define IEEE854_LONG_DOUBLE_BIAS 0x3fff - -__END_DECLS - -#endif /* ieee754.h */ diff -Nru glibc-2.3.3/sysdeps/generic/framestate.c glibc-2.3.3.patched/sysdeps/generic/framestate.c --- glibc-2.3.3/sysdeps/generic/framestate.c 2003-01-08 07:46:06.000000000 +0100 +++ glibc-2.3.3.patched/sysdeps/generic/framestate.c 2005-05-21 18:41:24.000000000 +0200 @@ -41,7 +41,11 @@ if (handle == NULL || (frame_state_for = (framesf) __libc_dlsym (handle, "__frame_state_for")) == NULL) +#ifndef __USING_SJLJ_EXCEPTIONS__ frame_state_for = fallback_frame_state_for; +#else + frame_state_for = abort; +#endif } return frame_state_for (pc, frame_state); diff -Nru glibc-2.3.3/sysdeps/generic/unwind-dw2.c glibc-2.3.3.patched/sysdeps/generic/unwind-dw2.c --- glibc-2.3.3/sysdeps/generic/unwind-dw2.c 2003-07-23 01:55:55.000000000 +0200 +++ glibc-2.3.3.patched/sysdeps/generic/unwind-dw2.c 2005-05-21 18:41:24.000000000 +0200 @@ -39,7 +39,6 @@ #endif -#ifndef __USING_SJLJ_EXCEPTIONS__ #ifndef STACK_GROWS_DOWNWARD #define STACK_GROWS_DOWNWARD 0 @@ -1287,4 +1286,3 @@ #include "unwind.inc" #endif /* _LIBC */ -#endif /* !USING_SJLJ_EXCEPTIONS */ diff -Nru glibc-2.3.3/sysdeps/unix/sysv/linux/arm/ioperm.c glibc-2.3.3.patched/sysdeps/unix/sysv/linux/arm/ioperm.c --- glibc-2.3.3/sysdeps/unix/sysv/linux/arm/ioperm.c 2003-02-20 23:22:35.000000000 +0100 +++ glibc-2.3.3.patched/sysdeps/unix/sysv/linux/arm/ioperm.c 2005-05-21 18:43:15.000000000 +0200 @@ -47,6 +47,12 @@ #include #include +/* see http://www.ussg.iu.edu/hypermail/linux/kernel/0311.0/0529.html */ +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23)) +#define CTL_BUS_ISA BUS_ISA /* and hope it's not the one from linux/input.h */ +#endif + #define PATH_ARM_SYSTYPE "/etc/arm_systype" #define PATH_CPUINFO "/proc/cpuinfo" @@ -80,7 +86,7 @@ * Initialize I/O system. There are several ways to get the information * we need. Each is tried in turn until one succeeds. * - * 1. Sysctl (CTL_BUS, BUS_ISA, ISA_*). This is the preferred method + * 1. Sysctl (CTL_BUS, CTL_BUS_ISA, ISA_*). This is the preferred method * but not all kernels support it. * * 2. Read the value (not the contents) of symlink PATH_ARM_SYSTYPE. @@ -100,8 +106,8 @@ { char systype[256]; int i, n; - static int iobase_name[] = { CTL_BUS, BUS_ISA, BUS_ISA_PORT_BASE }; - static int ioshift_name[] = { CTL_BUS, BUS_ISA, BUS_ISA_PORT_SHIFT }; + static int iobase_name[] = { CTL_BUS, CTL_BUS_ISA, BUS_ISA_PORT_BASE }; + static int ioshift_name[] = { CTL_BUS, CTL_BUS_ISA, BUS_ISA_PORT_SHIFT }; size_t len = sizeof(io.base); if (! sysctl (iobase_name, 3, &io.io_base, &len, NULL, 0)