diff -urN linux-2.6.11.7/arch/arm/kernel/entry-armv.S linux-2.6.11.7-eb/arch/arm/kernel/entry-armv.S --- linux-2.6.11.7/arch/arm/kernel/entry-armv.S 2005-04-07 20:57:28.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/kernel/entry-armv.S 2005-05-12 20:02:14.000000000 +0200 @@ -188,6 +188,12 @@ @ @ r0 - instruction @ +#ifdef CONFIG_EP93XX_CRUNCH + mov r0, sp + bl crunch_opcode + cmp r0, #1 + beq 1f +#endif ldr r0, [r2, #-4] adr r9, 1f bl call_fpe @@ -353,6 +359,15 @@ tst r3, #PSR_T_BIT @ Thumb mode? bne fpundefinstr @ ignore FP sub r4, r2, #4 +#ifdef CONFIG_EP93XX_CRUNCH +@ bl crunch_in + mov r0, sp + bl crunch_opcode +@ bl crunch_out + cmp r0, #1 + beq ret_from_exception +#endif +@ bl crunch_out @ @ fall through to the emulation code, which returns using r9 if @@ -476,6 +491,7 @@ * This is the return code to user mode for abort handlers */ ENTRY(ret_from_exception) +@ bl crunch_out2 get_thread_info tsk mov why, #0 b ret_to_user diff -urN linux-2.6.11.7/arch/arm/kernel/setup.c linux-2.6.11.7-eb/arch/arm/kernel/setup.c --- linux-2.6.11.7/arch/arm/kernel/setup.c 2005-04-07 20:57:42.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/kernel/setup.c 2005-05-12 20:03:40.000000000 +0200 @@ -314,6 +314,9 @@ sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); elf_hwcap = list->elf_hwcap; +#ifdef CONFIG_EP93XX_CRUNCH + elf_hwcap |= HWCAP_CRUNCH; +#endif cpu_proc_init(); } @@ -756,6 +759,7 @@ "vfp", "edsp", "java", + "crunch", NULL }; diff -urN linux-2.6.11.7/arch/arm/mach-ep93xx/crunch.c linux-2.6.11.7-eb/arch/arm/mach-ep93xx/crunch.c --- linux-2.6.11.7/arch/arm/mach-ep93xx/crunch.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.11.7-eb/arch/arm/mach-ep93xx/crunch.c 2005-05-15 22:32:52.000000000 +0200 @@ -0,0 +1,343 @@ +/* + * Cirrus MaverickCrunch support + * + * Copyright (c) 2003 Petko Manolov + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation; + */ + +#include +#include +#include +#include + +unsigned int read_dspsc_low(void) +{ + int res; + + asm volatile ( + "cdp p4, 1, c15, c0, c0, 7\n\t" // "cfmv32sc mvdx15, dspsc\n\t" + "mrc p5, 0, %0, c15, c0, 0" // "cfmvr64l %0, mvdx15" + :"=r" (res) + : + :"memory"); + + return res; +} + +unsigned int read_dspsc_high(void) +{ + int res; + + asm volatile ( + "cdp p4, 1, c15, c0, c0, 7\n\t" // "cfmv32sc mvdx15, dspsc\n\t" + "mrc p5, 0, %0, c15, c0, 1" // "cfmvr64h %0, mvdx15" + :"=r" (res) + : + :"memory"); + + return res; +} + +void write_dspsc(unsigned int dspsc) +{ + asm volatile ( + "mcr p5, 0, %0, c15, c0, 0\n\t" // "cfmv64lr mvdx15, %0\n\t" + "cdp p4, 2, c15, c0, c0, 7" // "cfmvsc32 dspsc, mvdx15" + : + :"r" (dspsc), "rN"(-1) + :"memory"); +} + +void crunch_init(void) +{ + write_dspsc(CRUNCH_INIT); + current->flags |= PF_USEDCRUNCH; +} + +/* + * had to do it this way since "clf(); cli();" takes longer + */ +static inline void clear_fiq_irq(void) +{ + int cpsr; + + asm volatile ( + "mrs %0, CPSR\n\t" + "orr %0, %0, #192\n\t" + "msr CPSR_c, %0" + :"=r" (cpsr) + : + :"memory"); +} + +/* + * had to do it this way since "stf(); sti();" takes (twice) longer + */ + +static inline void restore_fiq_irq(void) +{ + int cpsr; + + asm volatile ( + "mrs %0, CPSR\n\t" + "bic %0, %0, #192\n\t" + "msr CPSR_c, %0" + :"=r" (cpsr) + : + :"memory"); +} + +#ifdef CONFIG_EP93XX_CRUNCH_ACC +static inline void save_accumulators(struct task_struct *tsk) +{ + int tmp; + struct fp_crunch_struct *fp = &tsk->thread_info->fpstate.crunch; + + /* + * clear the IRQ & FIQ to avoid some of the bugs in the errata + */ + clear_fiq_irq(); + + asm volatile ( + "cdp p4, 1, c0, c0, c0, 2\n\t" // "cfmv32al mvfx0, mvax0\n\t" + "stc p5, c0, [%0], #4\n\t" // "cfstr32 mvfx0, [%0], 4\n\t" + "cdp p4, 1, c1, c0, c0, 3\n\t" // "cfmv32am mvfx1, mvax0\n\t" + "stc p5, c1, [%0], #4\n\t" // "cfstr32 mvfx1, [%0], 4\n\t" + "cdp p4, 1, c2, c0, c0, 4\n\t" // "cfmv32ah mvfx2, mvax0\n\t" + "stc p5, c2, [%0], #4\n\t" // "cfstr32 mvfx2, [%0], 4\n\t" + "cdp p4, 1, c3, c1, c0, 2\n\t" // "cfmv32al mvfx3, mvax1\n\t" + "stc p5, c3, [%0], #4\n\t" // "cfstr32 mvfx3, [%0], 4\n\t" + "cdp p4, 1, c4, c1, c0, 3\n\t" // "cfmv32am mvfx4, mvax1\n\t" + "stc p5, c4, [%0], #4\n\t" // "cfstr32 mvfx4, [%0], 4\n\t" + "cdp p4, 1, c5, c1, c0, 4\n\t" // "cfmv32ah mvfx5, mvax1\n\t" + "stc p5, c5, [%0], #4\n\t" // "cfstr32 mvfx5, [%0], 4\n\t" + "cdp p4, 1, c6, c2, c0, 2\n\t" // "cfmv32al mvfx6, mvax2\n\t" + "stc p5, c6, [%0], #4\n\t" // "cfstr32 mvfx6, [%0], 4\n\t" + "cdp p4, 1, c7, c2, c0, 3\n\t" // "cfmv32am mvfx7, mvax2\n\t" + "stc p5, c7, [%0], #4\n\t" // "cfstr32 mvfx7, [%0], 4\n\t" + "cdp p4, 1, c8, c2, c0, 4\n\t" // "cfmv32ah mvfx8, mvax2\n\t" + "stc p5, c8, [%0], #4\n\t" // "cfstr32 mvfx8, [%0], 4\n\t" + "cdp p4, 1, c9, c3, c0, 2\n\t" // "cfmv32al mvfx9, mvax3\n\t" + "stc p5, c9, [%0], #4\n\t" // "cfstr32 mvfx9, [%0], 4\n\t" + "cdp p4, 1, c10, c3, c0, 3\n\t" // "cfmv32am mvfx10, mvax3\n\t" + "stc p5,c10, [%0], #4\n\t" // "cfstr32 mvfx10, [%0], 4\n\t" + "cdp p4, 1, c11, c3, c0, 4\n\t" // "cfmv32ah mvfx11, mvax3\n\t" + "stc p5, c11, [%0, #0]" // "cfstr32 mvfx11, [%0, #0]" + :"=&r" (tmp) + :"0" (&fp->acc0[0]) + :"memory"); + + restore_fiq_irq(); +} +#endif + +#ifdef CONFIG_EP93XX_CRUNCH_ACC +static inline void restore_accumulators(struct task_struct *tsk) +{ + int tmp; + struct fp_crunch_struct *fp = &tsk->thread_info->fpstate.crunch; + + /* + * clear the IRQ & FIQ to avoid some of the bugs in the errata + */ + clear_fiq_irq(); + + asm volatile ( + "ldc p5, c0, [%0],#4\n\t" // "cfldr32 mvfx0, [%0], 4\n\t" + "cdp p4, 2, c0, c0, c0, 2\n\t" // "cfmval32 mvax0, mvfx0\n\t" + "ldc p5, c1, [%0],#4\n\t" // "cfldr32 mvfx1, [%0], 4\n\t" + "cdp p4, 2, c0, c1, c0, 3\n\t" // "cfmvam32 mvax0, mvfx1\n\t" + "ldc p5, c2, [%0],#4\n\t" // "cfldr32 mvfx2, [%0], 4\n\t" + "cdp p4, 2, c0, c2, c0, 4\n\t" // "cfmvah32 mvax0, mvfx2\n\t" + "ldc p5, c3, [%0],#4\n\t" // "cfldr32 mvfx3, [%0], 4\n\t" + "cdp p4, 2, c1, c3, c0, 2\n\t" // "cfmval32 mvax1, mvfx3\n\t" + "ldc p5, c4, [%0],#4\n\t" // "cfldr32 mvfx4, [%0], 4\n\t" + "cdp p4, 2, c1, c4, c0, 3\n\t" // "cfmvam32 mvax1, mvfx4\n\t" + "ldc p5, c5, [%0],#4\n\t" // "cfldr32 mvfx5, [%0], 4\n\t" + "cdp p4, 2, c1, c5, c0, 4\n\t" // "cfmvah32 mvax1, mvfx5\n\t" + "ldc p5, c6, [%0],#4\n\t" // "cfldr32 mvfx6, [%0], 4\n\t" + "cdp p4, 2, c2, c6, c0, 2\n\t" // "cfmval32 mvax2, mvfx6\n\t" + "ldc p5, c7, [%0],#4\n\t" // "cfldr32 mvfx7, [%0], 4\n\t" + "cdp p4, 2, c2, c7, c0, 3\n\t" // "cfmvam32 mvax2, mvfx7\n\t" + "ldc p5, c8, [%0],#4\n\t" // "cfldr32 mvfx8, [%0], 4\n\t" + "cdp p4, 2, c2, c8, c0, 4\n\t" // "cfmvah32 mvax2, mvfx8\n\t" + "ldc p5, c9, [%0],#4\n\t" // "cfldr32 mvfx9, [%0], 4\n\t" + "cdp p4, 2, c3, c9, c0, 2\n\t" // "cfmval32 mvax3, mvfx9\n\t" + "ldc p5, c10, [%0],#4\n\t" // "cfldr32 mvfx10, [%0], 4\n\t" + "cdp p4, 2, c3, c10, c0, 3\n\t" // "cfmvam32 mvax3, mvfx10\n\t" + "ldc p5, c11, [%0, #0]\n\t" // "cfldr32 mvfx11, [%0, #0]\n\t" + "cdp p4, 2, c3, c11, c0, 4" // "cfmvah32 mvax3, mvfx11" + :"=&r" (tmp) + :"0" (&fp->acc0[0]) + :"memory"); + + restore_fiq_irq(); +} +#endif + +void save_crunch(struct task_struct *tsk) +{ + int tmp; + struct fp_crunch_struct *fp = &tsk->thread_info->fpstate.crunch; + + asm volatile ( + "stcl p5, c0, [%0],#8\n\t" // "cfstr64 mvdx0, [%0], 8\n\t" + "stcl p5, c1, [%0],#8\n\t" // "cfstr64 mvdx1, [%0], 8\n\t" + "stcl p5, c2, [%0],#8\n\t" // "cfstr64 mvdx2, [%0], 8\n\t" + "stcl p5, c3, [%0],#8\n\t" // "cfstr64 mvdx3, [%0], 8\n\t" + "stcl p5, c4, [%0],#8\n\t" // "cfstr64 mvdx4, [%0], 8\n\t" + "stcl p5, c5, [%0],#8\n\t" // "cfstr64 mvdx5, [%0], 8\n\t" + "stcl p5, c6, [%0],#8\n\t" // "cfstr64 mvdx6, [%0], 8\n\t" + "stcl p5, c7, [%0],#8\n\t" // "cfstr64 mvdx7, [%0], 8\n\t" + "stcl p5, c8, [%0],#8\n\t" // "cfstr64 mvdx8, [%0], 8\n\t" + "stcl p5, c9, [%0],#8\n\t" // "cfstr64 mvdx9, [%0], 8\n\t" + "stcl p5, c10, [%0],#8\n\t" // "cfstr64 mvdx10, [%0], 8\n\t" + "stcl p5, c11, [%0],#8\n\t" // "cfstr64 mvdx11, [%0], 8\n\t" + "stcl p5, c12, [%0],#8\n\t" // "cfstr64 mvdx12, [%0], 8\n\t" + "stcl p5, c13, [%0],#8\n\t" // "cfstr64 mvdx13, [%0], 8\n\t" + "stcl p5, c14, [%0],#8\n\t" // "cfstr64 mvdx14, [%0], 8\n\t" + "stcl p5, c15, [%0, #0]\n\t" // "cfstr64 mvdx15, [%0, #0]\n\t" + "cdp p4, 1, c15, c0, c0, 7\n\t" // "cfmv32sc mvdx15, dspsc\n\t" + "stc p5, c15, [%2, #0]" // "cfstr32 mvfx15, [%2, #0]" + :"=&r" (tmp) + :"0" (&fp->regs[0]), "r" (&fp->dspsc) + :"memory"); +#ifdef CONFIG_EP93XX_CRUNCH_ACC + /* + * this call should be made exactly here since it's corrupting + * the contents of most crunch registers ;-) + */ + save_accumulators(tsk); +#endif +} + +void restore_crunch(struct task_struct *tsk) +{ + int tmp; + struct fp_crunch_struct *fp = &tsk->thread_info->fpstate.crunch; +#ifdef CONFIG_EP93XX_CRUNCH_ACC + /* + * same as above, but reversed. if you put the call below the 'asm' + * code then you'll corrupt the + */ + restore_accumulators(tsk); +#endif + asm volatile ( + "ldc p5, c15, [%2, #0]\n\t" // "cfldr32 mvfx15, [%2, #0]\n\t" + "cdp p4, 2, c15, c0, c0, 7\n\t" // "cfmvsc32 dspsc, mvdx15\n\t" + "ldcl p5, c0, [%0],#8\n\t" // "cfldr64 mvdx0, [%0], 8\n\t" + "ldcl p5, c1, [%0],#8\n\t" // "cfldr64 mvdx1, [%0], 8\n\t" + "ldcl p5, c2, [%0],#8\n\t" // "cfldr64 mvdx2, [%0], 8\n\t" + "ldcl p5, c3, [%0],#8\n\t" // "cfldr64 mvdx3, [%0], 8\n\t" + "ldcl p5, c4, [%0],#8\n\t" // "cfldr64 mvdx4, [%0], 8\n\t" + "ldcl p5, c5, [%0],#8\n\t" // "cfldr64 mvdx5, [%0], 8\n\t" + "ldcl p5, c6, [%0],#8\n\t" // "cfldr64 mvdx6, [%0], 8\n\t" + "ldcl p5, c7, [%0],#8\n\t" // "cfldr64 mvdx7, [%0], 8\n\t" + "ldcl p5, c8, [%0],#8\n\t" // "cfldr64 mvdx8, [%0], 8\n\t" + "ldcl p5, c9, [%0],#8\n\t" // "cfldr64 mvdx9, [%0], 8\n\t" + "ldcl p5, c10, [%0],#8\n\t" // "cfldr64 mvdx10, [%0], 8\n\t" + "ldcl p5, c11, [%0],#8\n\t" // "cfldr64 mvdx11, [%0], 8\n\t" + "ldcl p5, c12, [%0],#8\n\t" // "cfldr64 mvdx12, [%0], 8\n\t" + "ldcl p5, c13, [%0],#8\n\t" // "cfldr64 mvdx13, [%0], 8\n\t" + "ldcl p5, c14, [%0],#8\n\t" // "cfldr64 mvdx14, [%0], 8\n\t" + "ldcl p5, c15, [%0, #0]" // "cfldr64 mvdx15, [%0, #0]" + :"=&r" (tmp) + :"0" (&fp->regs[0]), "r" (&fp->dspsc) + :"memory"); +} + +void crunch_exception(int irq, void *dev_id, struct pt_regs *regs) +{ + int sc, opc; + + send_sig(SIGFPE, current, 1); + opc = read_dspsc_high(); + sc = read_dspsc_low(); + printk("%s: DSPSC_high=%08x, DSPSC_low=%08x\n", __FUNCTION__, opc, sc); + sc &= ~(1 << 21); /* we recure without this */ + write_dspsc(sc); +} + +/* + * only register ep9312 default FPU handler... + */ +__init int setup_crunch(void) +{ + int res; + + res = request_irq(CRUNCH_IRQ, crunch_exception, SA_INTERRUPT, "FPU", NULL); + if (res) { + printk("Crunch IRQ (%d) allocation failure\n", CRUNCH_IRQ); + return res; + } + + return res; +} + +static inline int insn_is_crunch(long insn) +{ + long tmp; + + tmp = (insn >> 24) & 0x0e; + /* cdp, mcr, mrc */ + if (tmp == 0x0e || tmp == 0x0c) { + tmp = (insn >> 8) & 0x0f; + if (tmp == 4) + return 1; + if (tmp == 5) + return 1; + if (tmp == 6) + return 1; + } + + return 0; +} + +int crunch_opcode(struct pt_regs *regs) +{ + long *insn; + struct task_struct *tsk = current; + + insn = (long *) (instruction_pointer(regs) - 4); +// printk("insn : %08lx \n", insn); + if (!insn_is_crunch(*insn)) { + /* + * not a crunch instruction, but might be another + * (FPA/VFP) floating point one + */ +// printk("No Crunch %08lx \n", insn); + return 0; + } + +// printk("Crunch %08lx \n", insn); + crunch_enable(); +// printk("crunch_enable\n"); + regs->ARM_pc -= 4; /* restart the Crunch instruction */ + if (tsk->flags & PF_USEDCRUNCH) { + restore_crunch(tsk); + } else { + crunch_init(); + } + tsk->flags |= PF_USEDFPU; + return 1; +} + +void crunch_in(void) +{ + printk("in !\n"); +} + +void crunch_out(void) +{ + printk("out !\n"); +} + +void crunch_out2(void) +{ + printk("out2 !\n"); +} + +__initcall(setup_crunch); diff -urN linux-2.6.11.7/arch/arm/mach-ep93xx/dma_ep93xx.c linux-2.6.11.7-eb/arch/arm/mach-ep93xx/dma_ep93xx.c --- linux-2.6.11.7/arch/arm/mach-ep93xx/dma_ep93xx.c 2005-05-15 22:34:17.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/mach-ep93xx/dma_ep93xx.c 2005-05-12 20:46:41.000000000 +0200 @@ -50,7 +50,7 @@ #undef DEBUG /*#define DEBUG 1 */ #ifdef DEBUG -#define DPRINTK( x... ) printk( ##x ) +#define DPRINTK( x... ) printk( x ) #else #define DPRINTK( x... ) #endif @@ -92,6 +92,7 @@ { int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA channel # from the handle. */ @@ -138,6 +139,7 @@ ep93xx_dma_dev_t dma_int = UNDEF_INT; unsigned int read_back, loop, uiCONTROL, uiINTERRUPT; + DPRINTK("%s \n", __FUNCTION__); loop = inl(M2M_reg_base+M2M_OFFSET_INTERRUPT); /* @@ -150,7 +152,7 @@ else if( inl(M2M_reg_base+M2M_OFFSET_INTERRUPT) & INTERRUPT_M2M_DONEINT ) dma_int = DONE; - DPRINTK("IRQ: b=%#x st=%#x\n", (int)dma->current_buffer->source, dma_int); + DPRINTK("IRQ: b=%#x st=%#x\n", (int)dma->current_buffer/*->source*/, dma_int); /* * Stall Interrupt: The Channel is stalled, meaning nothing is @@ -321,15 +323,14 @@ DPRINTK("End of stall handling. \n"); DPRINTK("STATUS - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_STATUS) ); - DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_CONTROL.Value) ); - DPRINTK("REMAIN - 0x%x \n", inl(M2M_reg_base+M2M_REMAIN.Value) ); - DPRINTK("PPALLOC - 0x%x \n", inl(M2M_reg_base+M2M_PPALLOC.Value) ); - DPRINTK("BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_BASE0.Value) ); - DPRINTK("MAXCNT0 - 0x%x \n", inl(M2M_reg_base+M2M_MAXCNT0.Value) ); - DPRINTK("CURRENT0 - 0x%x \n", inl(M2M_reg_base+M2M_CURRENT0.Value) ); - DPRINTK("BASE1 - 0x%x \n", inl(M2M_reg_base+M2M_BASE1.Value) ); - DPRINTK("MAXCNT1 - 0x%x \n", inl(M2M_reg_base+M2M_MAXCNT1.Value) ); - DPRINTK("CURRENT1 - 0x%x \n", inl(M2M_reg_base+M2M_CURRENT1.Value) ); +// DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_CONTROL.Value) ); +// DPRINTK("REMAIN - 0x%x \n", inl(M2M_reg_base+M2M_REMAIN.Value) ); +// DPRINTK("PPALLOC - 0x%x \n", inl(M2M_reg_base+M2M_PPALLOC.Value) ); +// DPRINTK("BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_BASE0.Value) ); +// DPRINTK("MAXCNT0 - 0x%x \n", inl(M2M_reg_base+M2M_MAXCNT0.Value) ); +// DPRINTK("CURRENT0 - 0x%x \n", inl(M2M_reg_base+M2M_CURRENT0.Value) ); +// DPRINTK("BASE1 - 0x%x \n", inl(M2M_reg_base+M2M_BASE1.Value) ); +// DPRINTK("MAXCNT1 - 0x%x \n", inl(M2M_reg_base+M2M_MAXCNT1.Value) ); DPRINTK("Buffer buf_id source size last used \n"); for(loop = 0; loop < 32; loop ++) @@ -437,7 +438,7 @@ DPRINTK("End of NFB handling. \n"); DPRINTK("STATUS - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_STATUS) ); DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_CONTROL) ); - DPRINTK("REMAIN - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_REMAIN) ); +/* DPRINTK("REMAIN - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_REMAIN) ); DPRINTK("PPALLOC - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_PPALLOC) ); DPRINTK("BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_BASE0) ); DPRINTK("MAXCNT0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_MAXCNT0) ); @@ -445,7 +446,7 @@ DPRINTK("BASE1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_BASE1) ); DPRINTK("MAXCNT1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_MAXCNT1) ); DPRINTK("CURRENT1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_CURRENT1) ); - +*/ DPRINTK("Buffer buf_id source size last used \n"); for(loop = 0; loop < 32; loop ++) { @@ -587,7 +588,7 @@ DPRINTK("STATUS - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_STATUS) ); DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_CONTROL) ); - DPRINTK("SAR_BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_SAR_BASE0) ); + /* DPRINTK("SAR_BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_SAR_BASE0) ); DPRINTK("DAR_BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_DAR_BASE0) ); DPRINTK("SAR_CURRENT0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_SAR_CURRENT0) ); DPRINTK("DAR_CURRENT0 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_DAR_CURRENT0) ); @@ -595,6 +596,7 @@ DPRINTK("SAR_BASE1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_SAR_BASE1) ); DPRINTK("DAR_BASE1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_DAR_BASE1) ); DPRINTK("BCR1 - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_BCR1) ); + */ /* @@ -639,6 +641,7 @@ ep93xx_dma_dev_t dma_int = UNDEF_INT; unsigned int loop, uiCONTROL, uiINTERRUPT; + DPRINTK("%s \n", __FUNCTION__); /* * Determine what kind of dma interrupt this is. */ @@ -801,7 +804,7 @@ DPRINTK("STATUS - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_STATUS) ); DPRINTK("CONTROL - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CONTROL) ); - DPRINTK("REMAIN - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_REMAIN) ); + /*DPRINTK("REMAIN - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_REMAIN) ); DPRINTK("PPALLOC - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_PPALLOC) ); DPRINTK("BASE0 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_BASE0) ); DPRINTK("MAXCNT0 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_MAXCNT0) ); @@ -809,6 +812,7 @@ DPRINTK("BASE1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_BASE1) ); DPRINTK("MAXCNT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_MAXCNT1) ); DPRINTK("CURRENT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT1) ); + */ DPRINTK("Buffer buf_id source size last used \n"); for(loop = 0; loop < 32; loop ++) @@ -1070,8 +1074,9 @@ int channel = -1; unsigned int loop; unsigned int M2P_reg_base; - unsigned int uiPWRCNT; + unsigned int uiPWRCNT; + DPRINTK("%s \n", __FUNCTION__); DPRINTK("DMA Open M2P with hw dev %d\n", device); @@ -1282,6 +1287,7 @@ unsigned int M2M_reg_base; unsigned int uiPWRCNT, uiCONTROL; + DPRINTK("%s \n", __FUNCTION__); DPRINTK("DMA Open M2M with hw dev %d\n", device); /* @@ -1528,6 +1534,7 @@ unsigned long flags; unsigned int M2M_reg_base, uiCONTROL; + DPRINTK("%s \n", __FUNCTION__); /* * Make sure the channel is disabled before configuring the channel. * @@ -1650,6 +1657,7 @@ unsigned int M2M_reg_base = dma->reg_base; unsigned int uiCONTROL; + DPRINTK("%s \n", __FUNCTION__); /* * Mask interrupts while we get this started. */ @@ -1767,7 +1775,7 @@ DPRINTK("DMA - It's been started!!"); DPRINTK("STATUS - 0x%x \n", inl(M2M_reg_base+M2M_OFFSET_STATUS) ); - DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_CONTROL.Value) ); + /*DPRINTK("CONTROL - 0x%x \n", inl(M2M_reg_base+M2M_CONTROL.Value) ); DPRINTK("REMAIN - 0x%x \n", inl(M2M_reg_base+M2M_REMAIN.Value) ); DPRINTK("PPALLOC - 0x%x \n", inl(M2M_reg_base+M2M_PPALLOC.Value) ); DPRINTK("BASE0 - 0x%x \n", inl(M2M_reg_base+M2M_BASE0.Value) ); @@ -1785,6 +1793,7 @@ DPRINTK("current buffer - %d \n", dma_pointers[0]->current_buffer); DPRINTK("last buffer - %d \n", dma_pointers[0]->last_buffer); DPRINTK("used buffers - %d \n", dma_pointers[0]->used_buffers); + */ /* * Unmask irqs @@ -1834,6 +1843,7 @@ unsigned long flags; unsigned int M2P_reg_base, uiCONTROL; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -1969,6 +1979,7 @@ unsigned long flags; int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2237,6 +2248,7 @@ ep93xx_dma_t * dma; int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2363,6 +2375,7 @@ ep93xx_dma_t *dma; int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2471,6 +2484,7 @@ int channel; unsigned int M2M_reg_base, M2P_reg_base; + DPRINTK("%s \n", __FUNCTION__); DPRINTK("ep93xx_dma_pause \n"); /* @@ -2579,6 +2593,7 @@ int channel; unsigned int M2P_reg_base; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2665,6 +2680,7 @@ unsigned long flags; int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2735,6 +2751,7 @@ int channel; ep93xx_dma_t * dma; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2786,6 +2803,7 @@ { int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -2837,6 +2855,7 @@ unsigned int loop; unsigned int M2P_reg_base; + DPRINTK("%s \n", __FUNCTION__); /* * Check if the device requesting a DMA channel is a valid device. */ @@ -2998,7 +3017,7 @@ DPRINTK("CURRENT0 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT0) ); DPRINTK("BASE1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_BASE1) ); DPRINTK("MAXCNT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_MAXCNT1) ); - DPRINTK("CURRENT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT1) ); + //DPRINTK("CURRENT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT1) ); DPRINTK("Buffer source size last used \n"); for(loop = 0; loop < 5; loop ++) @@ -3020,7 +3039,7 @@ DPRINTK("last buffer - %d \n", dma->last_buffer); DPRINTK("used buffers - %d \n", dma->used_buffers); - DPRINTK("CURRENT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT1) ); + //DPRINTK("CURRENT1 - 0x%x \n", inl(M2P_reg_base+M2P_OFFSET_CURRENT1) ); DPRINTK("VIC0IRQSTATUS - 0x%x, VIC0INTENABLE - 0x%x \n", *(unsigned int *)(VIC0IRQSTATUS), *(unsigned int *)(VIC0INTENABLE)); @@ -3047,6 +3066,7 @@ unsigned int M2M_reg_base, M2P_reg_base, uiCONTROL; int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Get the DMA hw channel # from the handle. */ @@ -3138,6 +3158,7 @@ { int channel; + DPRINTK("%s \n", __FUNCTION__); /* * Init some values in each dma instance. */ diff -urN linux-2.6.11.7/arch/arm/mach-ep93xx/Kconfig linux-2.6.11.7-eb/arch/arm/mach-ep93xx/Kconfig --- linux-2.6.11.7/arch/arm/mach-ep93xx/Kconfig 2005-05-15 22:34:17.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/mach-ep93xx/Kconfig 2005-05-12 20:47:25.000000000 +0200 @@ -138,6 +138,13 @@ Say Y here if you want to enable DMA Support for EP93XX family CPUs. +config EP93XX_CRUNCH + bool "EP93xx MaverickCrunch Support" + depends on ARCH_EP9302 || ARCH_EP9312 || ARCH_EP9315 + default n + help + Say Y here if you want to enable MaverickCrunch support for EP93XX family CPUs. + config ARCH_EP93XX_IDE bool "EP93XX IDE Support" depends on ARCH_EP9312 || ARCH_EP9315 diff -urN linux-2.6.11.7/arch/arm/mach-ep93xx/Makefile linux-2.6.11.7-eb/arch/arm/mach-ep93xx/Makefile --- linux-2.6.11.7/arch/arm/mach-ep93xx/Makefile 2005-05-15 22:34:17.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/mach-ep93xx/Makefile 2005-05-12 20:47:59.000000000 +0200 @@ -19,6 +19,7 @@ obj-$(CONFIG_MACH_ZEFEERDZQ) += mach-zefeerdzq.o obj-$(CONFIG_EP93XX_DMA) += dma_ep93xx.o +obj-$(CONFIG_EP93XX_CRUNCH) += crunch.o obj-$(CONFIG_EP93XX_SSP_LINUX) += ssp.o ssp2.o obj-$(CONFIG_EP93XX_SSP_CIRRUS) += ssp-cirrus.o diff -urN linux-2.6.11.7/arch/arm/Makefile linux-2.6.11.7-eb/arch/arm/Makefile --- linux-2.6.11.7/arch/arm/Makefile 2005-05-15 22:34:17.000000000 +0200 +++ linux-2.6.11.7-eb/arch/arm/Makefile 2005-05-12 20:49:35.000000000 +0200 @@ -59,8 +59,8 @@ # Need -Uarm for gcc < 3.x CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) -CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm -AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float +CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Wa,-mcpu=ep9312 -Uarm +AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float -Wa,-mcpu=ep9312 CHECKFLAGS += -D__arm__ diff -urN linux-2.6.11.7/drivers/video/ep93xxfb.c linux-2.6.11.7-eb/drivers/video/ep93xxfb.c --- linux-2.6.11.7/drivers/video/ep93xxfb.c 2005-05-15 22:34:18.000000000 +0200 +++ linux-2.6.11.7-eb/drivers/video/ep93xxfb.c 2005-05-12 21:18:01.000000000 +0200 @@ -622,7 +622,9 @@ * For kernel boot options (in 'video=xxxfb:' format) */ - fb_get_options("ep93xxfb", &option); + if (fb_get_options("ep93xxfb", &option)) + return -ENODEV; + ep93xxfb_setup(option); /* init all the important stuff in info */ diff -urN linux-2.6.11.7/include/asm-arm/arch-ep93xx/crunch.h linux-2.6.11.7-eb/include/asm-arm/arch-ep93xx/crunch.h --- linux-2.6.11.7/include/asm-arm/arch-ep93xx/crunch.h 2005-05-15 22:34:18.000000000 +0200 +++ linux-2.6.11.7-eb/include/asm-arm/arch-ep93xx/crunch.h 2005-05-12 21:18:27.000000000 +0200 @@ -1,6 +1,8 @@ #ifndef __asm_crunch_h__ #define __asm_crunch_h__ +#include "asm/arch/regmap.h" + #define CRUNCH_INIT 0x00900000 #define CRUNCH_IRQ 58 diff -urN linux-2.6.11.7/include/asm-arm/fpstate.h linux-2.6.11.7-eb/include/asm-arm/fpstate.h --- linux-2.6.11.7/include/asm-arm/fpstate.h 2005-04-07 20:58:31.000000000 +0200 +++ linux-2.6.11.7-eb/include/asm-arm/fpstate.h 2005-05-15 22:31:08.000000000 +0200 @@ -59,12 +59,28 @@ unsigned int save[0x98/sizeof(int) + 1]; }; +#ifdef CONFIG_EP93XX_CRUNCH +struct fp_crunch_struct { + long long regs[16]; +#ifdef CONFIG_EP93XX_CRUNCH_ACC + int acc0[3]; + int acc1[3]; + int acc2[3]; + int acc3[3]; +#endif + unsigned long dspsc; +}; +#endif + union fp_state { struct fp_hard_struct hard; struct fp_soft_struct soft; #ifdef CONFIG_IWMMXT struct iwmmxt_struct iwmmxt; #endif +#ifdef CONFIG_EP93XX_CRUNCH + struct fp_crunch_struct crunch; +#endif }; #define FP_SIZE (sizeof(union fp_state) / sizeof(int)) diff -urN linux-2.6.11.7/include/asm-arm/system.h linux-2.6.11.7-eb/include/asm-arm/system.h --- linux-2.6.11.7/include/asm-arm/system.h 2005-05-15 22:34:18.000000000 +0200 +++ linux-2.6.11.7-eb/include/asm-arm/system.h 2005-05-12 21:23:12.000000000 +0200 @@ -159,6 +159,19 @@ #define task_running(rq,p) \ ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock)) +#ifdef CONFIG_EP93XX_CRUNCH +#include +#define crunch_switch(prev, next) \ + do { \ + if (prev->flags & PF_USEDFPU) { \ + save_crunch(prev); \ + crunch_disable(); \ + } \ + prev->flags &= ~PF_USEDFPU; \ + } while (0) +#else +#define crunch_switch(prev, next) do { } while (0); +#endif /* * switch_to(prev, next) should switch from task `prev' to `next' * `prev' will never be the same as `next'. schedule() itself @@ -168,6 +181,7 @@ #define switch_to(prev,next,last) \ do { \ + crunch_switch(prev, next); \ last = __switch_to(prev,prev->thread_info,next->thread_info); \ } while (0) diff -urN linux-2.6.11.7/include/linux/sched.h linux-2.6.11.7-eb/include/linux/sched.h --- linux-2.6.11.7/include/linux/sched.h 2005-05-15 22:34:18.000000000 +0200 +++ linux-2.6.11.7-eb/include/linux/sched.h 2005-05-12 21:23:43.000000000 +0200 @@ -712,6 +712,7 @@ do { if (atomic_dec_and_test(&(tsk)->usage)) __put_task_struct(tsk); } while(0) #ifdef CONFIG_EP93XX_CRUNCH +#define PF_USEDFPU 0x00100000 /* task used FPU this quantum (SMP) */ #define PF_USEDCRUNCH 0x00200000 /* introduced to preserve PF_USEDFPU meaning across the architecture */ #endif